Introduction to the design of a processor
Introduction
Importance of the design of a processor
The performance of a computer is determined by the time that
the CPU it takes to execute programs:
CPU time = (instructions per program) × CPI × (cycle time)
The design of the processor determines:
The duration of the clock cycle
Number of cycles of clock per instruction, on average
Commonly these two factors have an inverse relationship:
Single-cycle processor
1 cycle per instruction
Long cycle time
Multi-cycle processor
Multiple cycles per instruction
Short cycle time
Marcos Sánchez-Élez Martín
Introduction to the design of a processor
Introduction
Introduction to the design of a processor
Introduction
Met Odologies for the design of a processor
Methodologies for the design of a processor
Step 1: Analyze the repertoire of instructions to obtain the requirements
of the data path
The data path should include as many Storage elements such as
records are visible to the programmer. In addition you can have other
transparent storage elements.
The data path must include as many types of operational items as
types of calculation operations are indicated in the repertoire of
instructions
The meaning of each instruction will be given by a set of
transfers between records. The data path must be capable of supporting
such transfers.
Step 2: Establish the timing methodology
Unicycle (CPI = 1): all transfers between involved records
in an instruction are performed in a single clock cycle
Multicycle (CPI> 1): transfers between registers involved in a
instruction are spread over several clock cycles.
Step 3: Select the set of modules (storage) ,
operatives and interconnection) that form the data path.
Step 4: Assemble the data path so that the requirements
imposed by the repertoire are met, locating the control points.
Step 5: Determine the values of the control points by analyzing the
] transfers between records included in each instruction.
Step 6: Design the control logic.
Marcos Sánchez-Élez Martín
Marcos Sánchez-Élez Martín
Introduction to the design of a processor
Introduction
Analyze the repertoire of instructions
68000 – CISC
Intel (X86) – CISC
MIPS – RISC
ARM – RISC
Introduction to the design of a processor
Introduction
] MIPS Architecture
Microprocessor without Interlocked Pipeline Stages
Created in 1981 by Hennessy
Produced by Silicon Graphics (SGI)
Used by:
TiVo
Windows CE
Cisco routers
Nintendo 64
Sony PlayStation, PlayStation 2, PlayStation Portable
Marcos Sánchez-Élez Martín
Marcos Sánchez-Élez Martín
Introduction to the design of a processor
Introduction
Introduction to the design of a processor
Introduction
R2000 (1985): processor with multicyclic multiplication operations and
division, within a mathematical coprocessor, the results of these
operations were achieved through particular instructions.
Also, although the registers were 32 bits they could be used as of 64
for double precision.
R3000 (1988): adds a cache of 32KB (later 64KB), an MMU for
manage virtual memory, was the first MIPS processor that was successful in
the market (1 million were sold). For example, it was used in the Play
Station, in addition to the first laptops that used Windows CE.
R4000 (1991): increases the instruction set to a 64
bit processor by adding the FPU within the chip. All this allows a high clock cycle
(in exchange the caches are reduced to 8KB) and a super-segmentation.
Nintendo64 uses a CPU based on this design, as well as the first
Cisco routers (36×0 and 7×00)
R8000 (1994): it was the first super-scalar processor that could work at
once with two ALUs and two memories. His unit FPU was perfect for calculations
scientists, but lasted in the market only one year.
R10000 (1995): had caches of 32 KB and its biggest innovation was the
use of the execution out of order
R20000 (2006): 2 cores … has not been produced
MIPS Architecture
All instructions have the same
size (32 bits)
All instructions are similar in format
] Code of operation 6 bits
There are only 3 formats of instructions
Accesses to simple memory
Direct record with displacement
Marcos Sánchez-Élez Martín
Marcos Sánchez-Élez Martín
Introduction to design of a processor
Introduction
31
31
31
Type R:
arithmetic-logic
Type I:
with memory
conditional jump
] Type J:
unconditional jump
26
21
16
11
6
op
6 bits
26
op
6 bits
26
op
6 bits
] rs
5 bits
21
rs
5 bits
rt
5 bits
16
rt
5 bits
rd
5 bits
shamt
5 bits
funct
6 bits
immediate
16 bits
address
26 bits
0
0
0 [19659002] The meaning of the fields is:
op: instruction identifier
rs, rt, rd: identifiers of source and destination records
shamt: quantity to be displaced (in displacement operations)
funct: selects the arithmetic operation to perform
immediately: immediate operand or displacement in addressing to base-register
address: destination address of the jump
Marcos Sánchez-Élez Martín
from Nettech Post http://bit.ly/2rZ8Gv5
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